Does anybody know of a GSL-like math library that can do Akima and cubic spline interpolation? It needs to be LGPLv2+ or some variant of BSD. GSL is GPLv3 which is incompatible with the the LGPLv2+ used in libcolord. GPL for a library is such a bad idea it’s not even funny.
I just tested the graphics, which will be laser engraved in the final oggstreamers. For the test I used a transparency sheet and laser printed the graphics with 600 dpi.
The result looks quite promising – here it is: (sorry for the bad photo quality)
Now for the offtopic itself: I'll be attending the Embedded World 2013 trade fair in Nürnberg february 27th and 28th, though I'll be staying in München (till saturday) and take the ICE those two days, just to see what's cooking in the industry I make my living from. I'm traveling alone, so if any of you feel like talking about dingux, embedded systems, electronics and/or whatnot over a couple of good german beers, drop me a note (email address available in the profile link on the left).
«Canonical» way of opening microchips:Cut a small hole in the center of the chip with a dremel:
WARNING!: All operations with acids must be performed in a fume hood, with proper protection (gloves, gas mask, e.t.c).
Put a droplet of fuming nitric or sulfuric acid there, heat up to ~100 ºC (~212 ºF). It is critical to use fuming acids - just concentrated (98% sulfuric or 70% nitric) won't cut it. After reaction ends - rinse with acetone, dry and put next droplet.
As a result we are getting exposed die, with all bond wires intact. The microchip still works - this might be useful if we want to probe it or modify eeprom data with UV laser.
What's inside K565RU5 (pin-compatible to 4164 DRAM chip) - 64 Kib DRAM chip, heart of most of amateur computers made in late soviet times and early 90's. There was also RU7 chip (256 Kib) but it was hard to buy.
Z80A - legendary successor of Intel 8080.
This is a photo of one of it's many clones. This one is likely made in DDR by MME company.
Die size - 4950x4720 µm, technology node - 5µm.
KR580VM80A just like KR580IK80A is an Intel 8080-compatible processor, which was in mass manufacturing in USSR until late 90's. Compared to KR580IK80A - die size is 20% smaller, IO peripherals are reworked.
Die size - 4634x4164 µm, 5µm technology.
MSP430F122 - 16-bit microcontroller made by Texas Instruments. What's interesting is that die is marked as MSP430F123, with larger flash size.
PIC12C508 - one of the "old" PIC's. Manufacturing technology - 1200nm, the oldest we've seen in microcontrollers being sold at the moment.
PIC16C505 - another "old" PIC, again 1200nm.
New RFID MIFARE chip from Moscow's metro - for several years Sitronics-Микрон was apparently using NXP RFID chips in Moscow's metro, but since February 2013 - we were finally able to find russian-made chips. New chip compared to NXP's one is 20% smaller, but not readable by NFC-readers in modern cell phones (might be a software issue). 180nm technology, aluminum metalization.
After metalization etch - it is clear that significant part of the chip is occupied by passive components (capacitors), and places under pads are empty.
Dual timer 556 - one of the oldest chips still being manufactured.
1886VE10 - Russian rad-hard 50Mhz microcontroller designed by Milandr and manufactured by Sitronics-Mikron on 180nm bulk-silicon technology. Radiation hardening is achieved by using edge-less transistors and 8T SRAM cells.
After metalization etch:
Not much to see in optical microscope:
Much better via scanning electron microscope:
These bright cilinders - are tungsten via's left after metalization etch. This is an image from electron microprobing - sample is being bombarded by electron beam and X-Ray spectra is analyzed.
STM32 STM32F103VGT6 - one of the largest STMicroelectronics microcontrollers on Cortex-M3 core.
1Mb of flash memory and 96kb of SRAM occupies it's enormous 5339x5188 µm die.
180nm SRAM is not really visible in optical microscope:
And again, electron microscope would help us:
Multiclet MCp0411100101 - basically is a superscalar out-of-order processor(4-wide at the moment) designed in Russia. 100Mhz clock, 180nm manufacturing technology.
Die size - 10.2x10.2 мм.
After metalization etch: (Warning, high-resolution image might kill your browser)
Area of SRAM cell- 21.28 µm2. Hence, each of 16 memory blocks has 72 Kibit of RAM. Obviously, ECC codes are used(72,64). Total accessible memory is 128 KiB.
Also, testing areas were cut along with the crystal, for example here is critical dimension test :
Hopefully that was interesting - follow us on Twitter @Zeptobars or subscribe to our RSS feed - we'll continue opening chips.
Die size 5645x2612 µm.
A couple of days ago I released colord 0.1.30. This was an otherwise unremarkable release with the normal splattering of a few bugfixes and the occasional small new features.
One such feature is the use of GResource. The new GResource stuff that landed in Glib 2.32 allows you to embed abritary binary data into the actual executable file. This is typically used for embedding small files that are normally loaded at runtime, for instance D-Bus introspection files or small application icons. Embedding that data also lets us strip the blanks from any XML file, and optionally compress the data too. It means we’re not seeking and loading many small files when the binary is run, which reduces by a small amount the amount of I/O that is done, and hence speeds up startup.
So I got thinking. Looking at the cold startup I/O profile of colord, the first thing it does is scan for any files in /usr/share/color/icc for *.icc files. On the default system in Fedora, we only have a few files installed in that directory, and all of them are generated by colord at package build time and shipped in the colord package. We know where they are going to be, and what the contents are. Typically there are ~10 profiles installed, and they are all less than 1kb in size.
Since 0.1.30, at build time the profiles generated by colord (and only those) get included into the binary as resources. This means the colord binary size grows by slightly less than 10k, but means we don’t load 10 small files from the disk at startup. The files are still installed like normal so that applications can reference them as files like before, but if there is an internal mmap’ed copy of the same profile we use that instead. This reduces the amount of I/O that colord does at startup by about half. It speeds the daemon startup by about 35ms on SSD hardware (as seeks are cheap) but on spinning rust drives or LiveCD media it makes an order of magnitude more difference.
 cold, as in not in hot-cache. Do ’echo 3 > /proc/sys/vm/drop_caches’ if you want to see the difference.
there are many links to interesting articles a few of which are new to me!
The test board was made on OSHPark's purple batch service and featured a large 784-ball BGA footprint as well as two DDR2 footprints and some 0402 pads.
Test boardThe boards I actually received had a FT256 packaged device on the 784-ball footprint since he couldn't find any cheap 784-ball devices.
The analysis being performed was a "dye and pry", a destructive test of joint quality. Step 1 is to squirt a dye of some sort under the BGA and bake to remove the solvent.
Dying the chipsI didn't have any red machinist's layout fluid (the normal choice in professional shops) so I made something of my own by performing a solvent extraction of a fluorescent yellow highlighter in IPA.
Fully dyed boardThe next step was to bake the board in an oven until all of the solvent had evpaorated. I didn't bake long enough so some of the dye was still liquid when I did the "pry" operation, making results for some of the outer balls questionable.
Once the dye has dried the next step is the "pry" operation: insert a small screwdriver under the chip and pry up around the edge until it pops off. By looking at where the dye reached, cracks in the joints can be seen.
I imaged balls of concern with a 10x objective in epi-illumination darkfield mode, then stacked the image with a brightfield image take under 385nm UV illumination for fluorescence.
BGA ball with large voidNo cracks were visible but several balls had fairly large voids. The one pictured above extended to the edge of the ball and covered 25.9% of the ball area, which fails the IPC 7095 class I standard (25% of ball area) for acceptable voiding at the package-ball interface. The majority of balls were within class I tolerances and most met the more stringent class II requirements as well, suggesting that while his process does have unacceptable voiding, not much improvement is necessary.
This got me curious as to how much voiding was present in my own boards. I ran the same test on an XC3S50A-4FTG256 on a dummy board using my standard process.
BGA ball with 6.2% voidingThe first ball I looked at had 6.2% voiding, well within the class II requirement (12.25%) and failing class III (4% voiding).
Lacking machine-vision tools to rapidly inspect all of the balls I decided to do a manual worst-case analysis and find the ball with the most visible voids.
BGA ball with 22.4% voidingI measured the worst ball at 22.4% voiding, slightly within the class I limit. While my process is still far from ideal, class I (normally used for typical consumer electronics) is more than acceptable for hobbyist prototypes.
- Click the ClipArt icon
- Download clipart first
- Select the clipart from Library
- Insert to Post it will be looks like:
Michael Adeyeye has been a member of the Village Telco community since its earliest days. Back then he was a graduate student at the University of Cape Town but has since gone on to earn his PhD there. He is now a lecturer in the faculty of Informatics and Design at the Cape Peninsula University of Technology. As a researcher, Michael has published papers on Village Telco and has volunteered his time in helping to deploy one of the first Village Telco test networks but more recently has set up his own Village Telco network in his home city in Ibadan, Nigeria..
Working through his own company, Asmicom, Michael partnered with colleagues in Ibadan to set up the Ibadan Wireless User Group. Asmicom’s goal is to transfer technical know-how to Nigeria and empower her youths. Their first project was to deploy a Mesh Potato network at a housing estate in Ibadan. The estate is home to a number of hostels for postgraduate students (studying at nearby institutions), offices and business centres. There are single family houses on the estate mostly occupied by their owners. The students, like the home owners, wanted a reliable way of communicating with one another. In addition, the organizations (which are mostly non-profit organizations) wanted an affordable communication service that could be used as an alternative to the costly GSM mobileservice.
To make matters worse, the underground cables used by the Public Switched Telephone Network (PSTN) were recently uprooted by a government contractor, when tarring the roads in the estate. These are the primary reasons for providing a scalable, standards-based, and DIY (Do it Yourself) telephone system in the community.
Most of the Mesh Potatoes are solar powered. Michael has been using solar power units from a UK solar power startup called BBOXX. Their BB12 unit is ideally suited to powering a Mesh Potato in Africa as well as providing a power source for laptops and/or lighting.
To the right you can see can see the BBOXXes in action. Those are 30W solar panels charging a 12 VDC 12AH battery. The blue LED lights on the front of the box indicate the charge level. And below on the left you can see the network installers in action.
Friends and colleagues of Michael’s deployed the network. Raphael Adeyeye, Samuel Adeyeye, Oluyomi Kabiawu and Olumide Alamu all worked tirelessly to get the network in place. You can see Raphael in action on the left and more of the Mesh Potatoes deployed on the right. Mesh Potatoes can be mounted just about anywhere.
If you’re interested in finding out more about their deployment or getting their help with a wireless mesh network, you can contact them at:
Organization: Asmic Computers
Location: Ibadan, Nigeria
We’ll check back in the coming months to find out how the network is growing. Kudos to Michael and the Ibadan Wireless User Group for providing the housing estate with an opportunity to choose an alternative communication services.
Mikron chip is 20% smaller. Die size 610x526 µm.
We've found functional difference - Mikron's chips are not readable by NFC readers in modern cell phones, but this might be a software issue.
Significant part of chip area is used by passive components:
I thought it was a neat coincidence that I was in a factory that manufactured exactly such memory sticks about a week before the conference. In fact, I managed to score a rare treat: the factory owner gave me a sheet of raw chip-on-flex, prior to bonding and encapsulation, to take home.
The USB sticks start life as bare FLASH memory chips. Prior to mounting on PCBs, the chips are screened for capacity and functionality. Below is a photo of the workstation where this happens:
In the image, you can see stacks of bare-die FLASH chips, awaiting screening with a probe card. I love the analog current meter and the use of rubber bands to hold it all together. The probe card has tiny needles on it that touch down on microscopic (less than 100-micron square) contacts on the chip surfaces. Below is what a probe card looks like.
Below is an image through the microscope on the micro-probing station, showing the needles touching down on the square pads at the edge of the FLASH chip’s surface.
Interestingly, this all happens in an absolutely non-clean-room environment. Workers are pretty much handling chips with tweezers and hand suction vises, and mounting the devices into these jigs by hand.
Once the chips are screened for functionality, they are placed by hand onto a PCB. This is not an unusual practice, pretty much every value-oriented wirebonding facility I’ve visited relies on the manual placement of bare die. The photo below shows a controller IC being placed on a panel of PCBs. The bare die are in the right hand side of the photo, sitting in the beige colored waffle pack.
The lady is using some sort of tool made out of hand-cut bamboo. I still haven’t figured out exactly how they work, but every time I’ve seen this process they are using what looks like a modified chopstick to place the chips on the board. My best guess is that the bamboo sticks have just the right surface energy to adhere to the silicon die, such that silicon will stick to the tip of the bamboo rod. A dot of glue is pre-applied to the bare boards, so when the operator touches the die down onto the glue, the surface tension of the glue pulls the die off of the bamboo stick.
It’s trippy to think that the chips inside my USB stick were handled using modified chopsticks.
The chips are then wirebonded to the board using an automated bonding machine which uses image recognition to find the location of the bond pads (this is part of the reason they can get away with manual die placement).
The first half of the video above starts out with the operator pulling off and replacing a mis-bonded wire by hand, and re-feeding the wire into the machine. Given that these wires are thinner than a strand of hair, and that the bonding pads are microscopic, this is no mean feat of manual dexterity.
Here’s a scan of the partially-bonded but fully die-mounted PCB that I was given as a memoir from my visit (I had since crushed some of the wire bonds). The panel contains eight USB sticks, each consisting of a FLASH memory chip and a controller IC that handles the bridging between USB and raw FLASH, a non-trivial task that includes managing bad block maps and error-correction, among other things. The controller is probably an 8051-class CPU running at a few dozen MHz.
Once the panels are bonded and tested, they are overmolded with epoxy, and then cut into individual pieces, ready for sale.
Interestingly, the entire assembly prior to encapsulation is flexible. The silicon chips have been thinned down by grinding off their back sides to the point where they can tolerate a small amount of flexing, and the PCB is also so thin, it is flexible.
For those of you interested in this kind of thing, here’s the die marking from the FLASH chip; apparently it is made by Intel:
Here is also a die shot of the controller chip:
And now you know where those tiny USB thumb drives are born.
Thanks to David Cranor for contributing images. Images used with permission.
The Ware for February 2013 is shown below.
For what it’s worth, here is a close-up of part of the ware: